Nanoelectronics with Spin

T breath-taking increase in performance of nanoelectronic circuits has been continuously supported by the uninterrupted miniaturization of devices and interconnects. Among the most crucial technological changes lately adopted by the semiconductor industry is the introduction of a new type of multi-gate three-dimensional (3D) transistors [1]. This technology combined with strain techniques and high-k dielectrics/metal gates offers great performance and power saving advantages over the planar structures and allows continuing scaling down to 14nm feature size and beyond. In order to continue with scaling further, a new material with improved transport characteristics for the channel must be introduced [2]. Although single devices with gate length as short as a few nanometers have been demonstrated [3], fabrication, control, and integration costs combined with reliability issues will gradually bring conventional transistor scaling to an end. The principle of transistor operation is fundamentally based on the charge of an electron interacting with the gate voltage induced electrostatic field. Another intrinsic electron characteristic, the electron spin, attracts at present much attention as a possible candidate for complementing or even replacing the charge degree of freedom in future electronic devices. The electron spin state is characterized by two projections on an axis and could be potentially used in digital information processing. In addition, it takes an amazingly small amount of energy to invert the spin orientation. The key advantages of all spin-based computing as compared to a conventional processor with equivalent functions are zero static power, small device count, and low supply voltage, as listed in a recent review [4].